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holt integrated circuits www.holtic.com 1 hi-8450, hi-8451, hi-8454, hi-8455 single / quad arinc 429 line receivers with integrated do-160g level 3 lightning protection ds8450 rev. a 12/16 ? test inputs bypass analog inputs and force digital outputs to a one, zero, or null state (not available on hi-8455) ? industrial and extended temperature ranges ? burn-in available pin configuration (top view) testa vdd inb ina testb outb outa gnd 8-pin plastic soic - nb 1 8 2 3 4 5 6 7 hi-8450psx hi-8451psx hi-8454psx & hi-8455psx quad receiver in1a in1b in2a in2b testa (8454 only) testb (8454 only) in3a in3b in4a in4b out1a out1b out2a out2b vdd gnd out3a out3b out4a out4b 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 20-pin plastic tssop package table 1. function table arinc inputs ina - inb testa testb outa outb -2.5 to +2.5v 0 0 0 0 < -6.5v 0 0 0 1 > +6.5v 0 0 1 0 x 0 1 0 1 x 1 0 1 0 x 1 1 0 (1) 0 (1) x 1 1 hi-z (2) hi-z (2) note (1): hi-8451 and hi-8454 only. note (2): hi-8450 only. general description holts family of arinc 429 line receivers include internal lightning protection circuitry which ensures compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b) without the use of any external components. pin surge levels for level 3 are summarized below. the hi- 8450 and hi-8451 are single arinc 429 line receivers available in compact 8-pin soic packages. the hi-8454 and hi-8455 contain 4 independent arinc 429 line receivers. waveform 3 waveform 4 waveform 5a waveform 5b voc/isc voc/isc voc/isc voc/isc 600v/24a 300v/60a 300v/300a 300v/300a the devices are designed to operate from either a 5v or 3.3v supply. each receiver channel translates incoming arinc 429 data bus signals to a pair of ttl / cmos outputs. the testa and testb inputs bypass the analog inputs for testing purposes. they force the receiver outputs to the specifed zero, one or null state. the arinc inputs are ignored when the devices are in test mode. the hi-8451 and hi-8454 produce low outputs when the testa and testb inputs are held high, whereas the hi-8450 produces high impedance outputs when the testa and testb inputs are held high. the hi- 8455 does not have test inputs and these pins may be considered no-connect (nc). the parts are available in industrial -40 o c to +85 o c, or extended, -55 o c to +125 o c temperature ranges. optional burn-in is available on the extended temperature range. features ? internal lightning protection circuitry ensures compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b) ? direct connection to arinc 429 bus with no external components ? 3.3v or 5.0v single supply operation december 2016
holt integrated circuits 2 block diagrams test rina rinb null zero null one test a routb rout a sq r la tch la tch sq testb r test a testb test lightning protection and translation figure 1. line receiver block diagram in1a in1b in2a in2b in3a in3b in4a in4b testa testb out1a out1b out2a out3a out3b out4a out4b out2b figure 2. hi-8454 block diagram functional description figure 1 shows the general architecture of an arinc 429 receiver. the receiver operates off the vdd supply only. the inputs rina and rinb may be connected directly to the arinc 429 bus. internal lightning protection circuitry ensures compliance with rtca/do-160g, section 22 level 3 pin injection test waveform set a (3 & 4), set b (3 & 5a) and set z (3 & 5b) without the use of any external components. after level translation, the inputs are buffered and become inputs to a differential amplifer. the amplitude of the differential signal is compared to levels derived from a divider between vdd and ground. the nominal settings correspond to a one/zero amplitude of 6.0v and a null amplitude of 3.3v. the status of the arinc receiver input is latched. a null input resets the latches and a one or zero input sets the latches. the logic at the output is controlled by the test signal which is generated by the logical or of the testa and testb pins (not available on hi-8455). if testa and testb are both one, the outputs are pulled low (hi- 8451 and hi-8454 only). this allows the digital outputs of a transmitter to be connected to the test inputs through control logic for system self-test purposes. in the case of hi-8450, if testa and testb are both one, the outputs are high impedance (hi-z). hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 3 pin descriptions table 2. pin descriptions symbol function description in1a arinc input receiver 1 positive input in1b arinc input receiver 1 negative input in2a arinc input receiver 2 positive input in2b arinc input receiver 2 negative input testa logic input test input (not available on hi-8455) testb logic input test input (not available on hi-8455) in3a arinc input receiver 3 positive input in3b arinc input receiver 3 negative input in4a arinc input receiver 4 positive input in4b arinc input receiver 4 negative input out4b logic output receiver 4 zero output out4a logic output receiver 4 one output out3b logic output receiver 3 zero output out3a logic output receiver 3 one output gnd power ground supply voltage vdd power +3.3v or +5v supply voltage out2b logic output receiver 2 zero output out2a logic output receiver 2 one output out1b logic output receiver 1 zero output out1a logic output receiver 1 one output hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 4 absolute maximum ratings supply voltage (v dd ) -0.3v to +7v logic input voltage range -0.3v to +5.5v arinc input voltage -120v to + 120v solder temperature (refow) 260 o c storage temperature -65 o c to +150 o c esd-hbm (js-001-2012) logic and supply pins 2,000v arinc 429 bus input pins 1,000v rtca/do-160g, section 22 pin injection waveform voc/isc 3 1,000v/40a 4 500v/100a 5a 500v/500a 5b 500v/500a recommended operating conditions supply voltages v dd ................................... 3.0v to +5.5v temperature range industrial screening .............. -40 o c to +85 o c hi-temp screening .............. -55 o c to +125 o c note: stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. these are stress ratings only. operation at the limits is not recommended. electrical characteristics table 3. dc electrical characteristics v dd = +5.0v 10% or +3.3v 10%, gnd = 0v, t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units arinc inputs input voltage one or zero v din differential input voltage 6.5 10 13 v null v nin differential input voltage 2.5 v common mode v com with respect to gnd 5.0 v input resistance ina to inb r diff supplies foating 30 k input to gnd or v dd r sup supplies foating 15 k input hysteresis v hys 0.5 1.0 v input capacitance arinc differential c ad 5 10 pf arinc single ended to gnd c as 10 pf hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 5 parameters symbol test conditions min typ max units test inputs logic input voltage high v ih 80%v dd v low v il 20%v dd v logic input current sink i ih v ih = v dd 200 a source i il v il = 0v -1.0 a outputs logic output voltage high v oh i oh = -5.0ma, v dd = 5.0v 2.4 v i oh = -4.0ma, v dd = 3.3v 2.4 v low v ol i oh = 5.0ma, v dd = 5.0v 0.4 v i oh = 4.0ma, v dd = 3.3v 0.5 logic output voltage (cmos) high v ohc i oh = -100a v dd ?0.2 v low v olc i ol = 100a gnd+0.2 v supply current v dd current (hi-8454, hi-8455) i dd v dd = 5.0v 14 20 ma v dd = 3.3v 9 15 ma v dd current (hi-8450, hi-8451) i dd v dd = 5.0v 12 18 ma v dd = 3.3v 8 14 ma table 4. ac electrical characteristics v dd = +5.0v 10% or +3.3v 10%, gnd = 0v, t a = operating temperature range (unless otherwise stated) parameters symbol test conditions min typ max units switching characteristics propagation delay in to out t lh c l = 50pf 150 300 ns t hl c l = 50pf 150 300 ns output rise time t r 10% to 90% 15 50 ns output fall time t f 90% to 10% 15 50 ns propagation delay test to out t toh 50 ns t tol 50 ns hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 6 lightning induced transient voltage waveforms waveform 3. 0 t 50% v or i largest peak 25% to 75% of largest peak figure 3. do-160g lightning induced transient voltage waveform 3. voc = 600v, isc = 24a, frequency = 1mhz 20%. waveform 4. 0 t 50% v or i peak t1 t2 t1 = 6.4s 20% t2 = 70s 20% figure 4. do-160g lightning induced transient voltage waveform 4. voc = 300v, isc = 60a. hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 7 waveform 5. v or i 0 t 50% peak t1 t2 5a: t1 = 40 s 20% t2 = 120 s 20% 5b: t1 = 50 s 20% t2 = 500 s 20% figure 5. do-160g lightning induced transient voltage waveforms 5a and 5b. voc = 300v, isc = 300a. hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 8 additional pin configurations 24 - n/c 23 - out2a 22 - out2b 21 - vdd 20 - gnd 19 - out3a 18 - out3b 17 - n/c n/c - 9 in4a - 10 in4b - 11 n/c - 1 in2a - 2 32 - in1b 31 - in1a 30 - n/c 29 - vdd 28 - out1a 27 - out1b 26 - n/c 25 - n/c n/c - 12 n/c - 13 gnd - 14 out4a - 16 out4b - 15 in2b - 3 testa - 4 testb - 5 in3a - 6 in3b - 7 n/c - 8 32-pin plastic qfn hi-8454pcx ordering information part number lead finish blank tin / lead (sn / pb) solder f 100% matte tin (pb-free, rohs compliant) part number temperature range flow burn in i -40 o c to +85 o c i no t -55 o c to +125 o c t no m -55 o c to +125 o c m yes part number package description 8450ps 8 pin plastic narrow body soic (8hn) 8451ps 8 pin plastic narrow body soic (8hn) 8454ps 20 pin plastic tssop (20hs) 8454pc 32 pin plastic qfn (32pcs) 8455ps 20 pin plastic tssop (20hs) hi - 845xxx x x (plastic) hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 9 revision history revision date description of change ds8450, rev. new 01/14/14 initial release rev. a 12/05/16 remove power dissipation spec from absolute maximum ratings . hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 10 package dimensions millimeters (inches) see detail a 0 o to 8 o detail a p in 1 6.00 (0.236) 3.90 (0.154) 4.90 (0.193) 0.1750.075 (0.00 7 0.003) 1.27 (0.050) 0.83 5 0.435 (0.03 30.017) 1.25 (0.049) 0.175 0.075 (0.00 7 0.003) 0.4 1 0.10 (0.01 60.004) bsc bsc bsc bsc min. 8-pin plastic small outline (soic) - nb (narrow body) package type: 8hn bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) millimeters (inches) package type: 20hs 0 to 8 pin 1 6.500 0.100 (0.25 6.004) 0.925 0.125 (0.0360.005) 0.100 0.050 (0.0040.002) detail a see detail a 0.650 (0.026) bsc 0.600 0.150 (0.024 ) 0.006 6.400 0.150 (0.252 ) 0.006 0.2200.050 (0.008 70.002) 0.1450.055 (0.00 6 0.002) 4.400 0.100 (0.17 30.004) 20-pin plastic tssop bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) hi-8450, hi-8451, hi-8454, hi-8455
holt integrated circuits 11 3.400 0.050 (0.134 0.002) 0.4000.050 (0.0160.002) 0.25 (0.010) 0.50 (0.0197) 0.200 (0.008) 1.00 (0.039) 5.000 (0.197) bsc 3.400 0.050 (0.134 0.002) typ typ bottom view top view bsc 5.000 (0.197) bsc ma x electrically isolated heat sink pad on bottom of package. connect to any ground or power plane for optimum thermal dissipation. millimeters (inches) package type: 32pcs 32-pin plastic chip-scale package (qfn) bsc = ?basic spacing between centers? is theoretical true position dimension and has no tolerance. (jedec standard 95) hi-8450, hi-8451, hi-8454, hi-8455

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